Power Supply: VDD=1.2V (1.14V to 1.26V)
VDDQ = 1.2V (1.14V to 1.26V)
VPP - 2.5V (2.375V to 2.75V)
VDDSPD=2.25V to 3.6V
Nominal and dynamic on-die termination (ODT) for data, strobe, and mask signals
Low-power auto self refresh(LPASR)
Data bus inversion (DBI) for data bus
On-die VREFDQ generation and calibration
On-board I2 serial presence-detect (SPD) EEPROM
16 internal banks; 4 groups of 4 banks each
Fixed burst chop (BC) of 4 and burst length (BL) of 8 via the mode register set (MRS)
Selectable BC4 or BL8 on-the-fly (OTF)
Databus write cyclic redundancy check (CRC)
Temperature controlled refresh (TCR)
Command/Address (CA) parity
Per DRAM Addressability is supported
8 bit pre-fetch
Fly-by topology
Command/Address latency (CAL)
Terminated control command and address bus
PCB: Height 1.23” (31.25mm)
Gold edge contacts
RoHS Compliant and Halogen-Free